Now available to order — estimated Batch 1 ship date: October 15, 2026
Cerelog ESP-EEG 16-channel dual ADS1299 biosensing board – front view on white background

Research Instrument — Not a Medical Device

Cerelog ESP-EEG 16-Channel board – front view thumbnail Cerelog ESP-EEG board with LiPo battery attached thumbnail Cerelog ESP-EEG board in its protective enclosure case thumbnail Cerelog ESP-EEG 16-Channel board – back of PCB thumbnail Cerelog ESP-EEG 16-Channel board connection diagram thumbnail Cerelog ESP-EEG full demo set with board and accessories thumbnail

Cerelog ESP-EEG 16-ChannelHigh-Density Brain Computer Interface Circuit Board

High Precision (Dual ADS1299) 16 Channel Biosensing Board for Recording:

EEG 🧠 EMG 💪 ECG ❤️ EOG 👁️

Easily Stream Data To:

BrainFlow (Python, Java, C#, C++, R, MATLAB, Julia & more — API/SDK enables you to Create your own custom apps & Process data with Machine Learning) (custom fork) OpenBCI GUI (Connect directly! — no fork download required) Lab Stream Layer (LSL)

About the 16-Channel ESP-EEG

The Cerelog ESP-EEG 16-Channel board doubles the channel count of the original 8-channel ESP-EEG by incorporating dual Texas Instruments ADS1299 24-bit ADCs on a single PCB. Designed for high-density EEG, EMG, ECG, and BCI research, this board provides 16 differential input channels plus 1 bias probe — all while maintaining the same True Closed-Loop Active Bias (Drive Right Leg / DRL) noise reduction architecture, ESP32-S3-Mini dual-core processor, USB-C connectivity, WiFi support, and onboard LiPo battery charging that researchers have come to rely on from the 8-channel model.

The 16-channel board is fully compatible with BrainFlow, the OpenBCI GUI (connect directly — no fork download required), and Lab Streaming Layer (LSL), making it a drop-in upgrade for labs and researchers who need higher spatial resolution without changing their existing software workflows. Open-source firmware and schematics will be available on GitHub upon release.

V1 vs 16-Channel — What's New

8-Channel vs 16-Channel

Twice the spatial resolution — dual ADS1299 on a single board

Feature ESP-EEG 8-Channel ESP-EEG 16-Channel
Channels 8 differential 16 differential
Analog Front-End Single ADS1299
24-Bit
Dual ADS1299
24-Bit
Standalone Recording

Record CSV files to a microSD card without a computer with external LiPo battery*

In testing, a 2000 mAh battery recorded a corruption-free 2.06 GB file at 250 SPS across all 16 channels — ~18.3 hours of data — before the battery died. The 5000 mAh battery linked in the accessories section below should give a theoretical battery life of ~45.7 hours at an estimated ~109 mA draw.

*MicroSD card and battery sold separately

MicroSD usage instructions →
Feature ESP-EEG V1 ESP-EEG 16-Channel
Onboard MicroSD
(32 GB max)
✗ No ✓ Yes
Record untethered — no computer required
Cleaner Signal (vs V1)

Superior filtering and bias performance

Differential hardware filtering on top of the standard single-ended filtering —what most devices (including the OpenBCI Cyton) are missing to help eliminate common-mode noise.

Feature ESP-EEG V1 ESP-EEG 16-Channel
Common-Mode Filtering Standard Enhanced
Differential Input Filtering ✗ No ✓ Yes
Rare — most devices on the market lack this
Bias Pin Design Basic Improved Active Bias
Technical Explanation:

Texas Instruments' own ADS1299 documentation strongly recommends two separate input filters — a common-mode filter and a differential filter. Almost no board on the market ships both, and the reason is a design trap. The montage selector switch that swaps between referential and differential mode lives inside the ADS1299 itself. If you rely on that internal switch to change montage with a register write, you are forced to commit to one fixed input filtering arrangement that has to serve both modes. Faced with that choice, most companies keep the common-mode filter, skip the differential filter entirely, and ship it. It is a lazy solution, and it is paid for in performance.

Once the differential filter is gone, the remaining single-ended common-mode capacitors are forced to do the job of two different capacitors at once. They still have to roll off the high frequencies approaching the ~1 MHz band to prevent high-frequency aliasing — which was the differential capacitor's job — so they are forced to be large. That is exactly where the design breaks down. The differential capacitor is a single capacitor: large as it is, there is no second part for it to be mismatched against. A pair of large single-ended capacitors is a different story — real components carry real tolerance, the two never match exactly, and that imbalance exacerbates the very common-mode noise the filter was meant to remove. Common-mode-only filtering devices built this way, including the OpenBCI Cyton, are fighting their own input stage.

Cerelog was smart about this on the V2 and 16-Channel boards: we moved montage selection off the chip and onto physical hardware switches on the PCB. You still swap freely between referential and differential montage — but because we no longer depend on the ADS1299's internal selector, we are free to build the arrangement TI actually recommends. The big capacitor moves to the middle, differential position, where a tolerance mismatch has nothing to mismatch against and cannot hurt us, and smaller capacitors go inside the common-mode filters where they belong. The result is dedicated common-mode filtering and dedicated differential filtering — both present, each doing only its own job.

Before — common-mode only

Common-mode-only input filter CH1 plus and CH1 minus each pass through a series resistor into a large capacitor to ground. Nothing is connected between the two legs. CH1+ R LARGE CH1− R LARGE no cap between legs IN1P IN1N ADS1299
The OpenBCI Cyton and most other ADS1299 boards. Each leg gets its own RC filter to ground, and those two capacitors are forced large so they can also absorb the ~1 MHz anti-alias job. Because they are a pair, their tolerance mismatch unbalances the input and turns common-mode interference into differential noise.

After — Cerelog V2 & 16-Channel

Dedicated common-mode and differential input filter CH1 plus and CH1 minus each pass through a series resistor into a small capacitor to ground, and a single large capacitor is connected directly between the two legs. CH1+ R SMALL CH1− R SMALL LARGE DIFFERENTIAL SINGLE CAP IN1P IN1N ADS1299
The same RC filters stay on each leg, but the capacitors drop to their proper common-mode size, and the big capacitor moves to the middle — straight across CH1+ and CH1− — where it does the differential job alone. One capacitor has nothing to be mismatched against, so tolerance no longer costs you common-mode rejection.

This is the original optimized filtering arrangement that much of the BCI hardware industry was forced to design out just to keep register-based montage switching. Cerelog put it back. That is why these boards unlock far more of the ADS1299's real potential than hardware that stopped at single-ended filtering: stronger common-mode rejection, proper anti-alias protection near 1 MHz, and no self-inflicted imbalance in the input stage.

Enhanced Hardware Access

Battery monitoring exposed on-board via ESP32 GPIO for custom firmware

Battery life can be monitored by the user: IO0 (ADC1_CH0) senses the battery through a resistor divider network — multiply the measured voltage by 2 to get the real battery voltage.

Event sync trigger exposed on-board via ESP32 GPIO for custom firmware

Event sync trigger input: IO6 (ADC1_CH5) is broken out from the ESP32 for an external trigger — 3.3 V max, with a current-limiting input resistor. Modify the existing firmware to accept the trigger for tests that need a sync.

Hardware capability only — not coded into the default firmware. Intended for users modifying the firmware for custom applications.

Just like the OpenBCI Cyton, the trigger input is not opto-isolated — the user is responsible for the safety of whatever they plug into it.

Quick Montage Configuration

The board supports both a referential montage (SRB1) and a differential montage (CH+ / CH–), and you choose between them with the physical slider switches on the PCB — not in software.

The switches are somewhat recessed — use something like a pin or the tip of a pair of tweezers to move them, rather than your fingers.

16-Channel wiring instructions →
Flexible Bias Pin Configuration

Default: True Closed-Loop Active Bias (DRL) — recommended for EEG and most EMG

The BIAS pin implements True Closed-Loop Active Bias (Drive Right Leg / DRL): it feeds a processed, inverted common-mode signal back through a dedicated electrode, actively cancelling interference such as 50/60 Hz mains hum. This is the best-performing configuration and the way the board ships — leave the jumper installed in the BIAS_EN slot and connect your bias electrode to the BIAS pin.

Optional: open-loop style bias via ALT_B — sometimes preferred for EMG

Some users prefer a more open-loop bias arrangement, which can occasionally suit EMG work. To try it, connect your bias electrode to the ALT_B pin instead and remove the jumper from the BIAS_EN slot. The two setups are mutually exclusive: ALT_B works only with BIAS_EN removed, and the BIAS pin works only with the jumper installed.

For normal use, keep the BIAS_EN jumper in place and use the regular BIAS pin — closed-loop active bias is the better-performing option. ALT_B is provided for users who want to experiment with alternative bias configurations.

📉 Superior Noise Reduction (Closed-Loop Bias)(All Cerelog Devices Feature)

Unlike many consumer EEG devices that use "open-loop" or passive grounding strategies, the Cerelog ESP-EEG implements a True Closed-Loop Active Bias (Drive Right Leg).

The Problem: Many competitors leave the bias feedback loop open, rendering the noise cancellation ineffective against movement artifacts and 50/60Hz hum. Their bias pin effectively becomes the average of the supply rails and acts as a ground on their device making the bias pin not function as effectively intended on the ADS1299 datasheet.

Our Solution: We utilize the full capability of the ADS1299 to measure the common-mode signal, invert it, and actively drive it back into the body.

The Result: A significantly lower noise floor and fewer artifacts, allowing for research-grade data capture even in non-shielded environments.

Feature ESP-EEG V1 ESP-EEG 16-Channel
Processor ESP32-WROOM-32
Single-Core
ESP32-S3-Mini
Dual-Core
Eliminates the slow serial bridge — native USB support unlocks higher throughput
ADC ADS1299
8-Channel, 24-Bit
Dual ADS1299
16-Channel, 24-Bit
AVDD / AVSS Header Pins
+2.5 V / –2.5 V ADC supply rails on header pins
✗ No ✓ Yes
Powers user self-supplied active electrodes (ie; ThinkPulse* active electrodes)
*Non affiliated 3rd party vendor

Key Features (16-Channel Design)

  • ✓16-Channel Dual ADS1299 ADCs — Two Texas Instruments 24-bit, research-grade analog front-ends for high-density spatial coverage
  • ✓ESP32-S3-Mini Dual-Core Processor — Bluetooth Low Energy (BLE) and WiFi connectivity, USB-C, and onboard LiPo battery charging
  • ✓True Closed-Loop Active Bias (DRL) — Advanced noise reduction technique that feeds a processed reference signal back through a dedicated electrode
  • ✓USB-C, Bluetooth LE & WiFi — Primary USB-C connection, plus Bluetooth Low Energy (BLE) and WiFi for LSL streaming to the OpenBCI GUI (connect directly — no fork required)
  • ✓Onboard LiPo Charging — Untethered recording sessions with battery power
  • ✓Open-Source Firmware & Schematics — Fully available on GitHub for inspection, modification, and community contributions
  • ✓BrainFlow, OpenBCI GUI, & LSL Compatible — Drop-in upgrade for existing research workflows and toolchains

Research-Grade Data at a Fraction of the Price:

Same gold-standard ADC (ADS1299) with modern architecture MCU (ESP32).

Feature Cerelog ESP-EEG 16-CH OpenBCI Cyton + Daisy (16 CH)
Chip ADS1299 ADS1299
Data Resolution 24 Bit 24 Bit
Sample Rate (Streaming) 125 SPS 125 SPS
Sample Rate (MicroSD Logging) 250 SPS 250 SPS
Standalone? ✅ YES ✅ YES
Total Cost $999.99 $2,499*

*All prices as of AUG 17, 2026

Find the project on our Github Page (Instructions + Open Source Firmware, Software & Schematics)
Discord Join the Discord Community server here to have your questions answered, fast support, and talk to other users
Video Demos
Demo of device used to control robotic hand

ESP-EEG Robotic Hand Controller — A demonstration of using the EMG capability of the ESP-EEG bio-signal sensor to control a robotic hand.

GitHub code for EMG robotic hand control
Playing pong game with eye movement (EOG) - user demo

ESP-EEG EOG Pong — A user demonstration of playing a Pong game using eye movement (Electrooculography) with the ESP-EEG bio-signal sensor.

Learn about the game development itself here.

GitHub code for EOG pong game

To run: clone the repo and run python pong_game_brainflow.py --eog (on Mac use python3)

Playing Pong with device and SSVEP

ESP-EEG SSVEP Pong — A demonstration of using the SSVEP (Steady-State Visual Evoked Potential) capability of the ESP-EEG to play a game of Pong hands-free using brain signals. The board also supports P300-based BCI paradigms.

Video from one of our users
Product Overview Guide and Live Data Visualization

See the Cerelog ESP-EEG board in action. These demos showcase the real-time data streaming and BCI control capabilities.

Video demonstrating how to use product for real-time EEG signal data streaming and plotting.

$999.99 USD

*Shipping calculated at checkout

International Shipping Available
⌛ Order by September 30 to be included in Batch 1 3/50units remaining (this batch) Estimated Batch 1 Ship Date October 15, 2026 Built to order · tracking emailed when your unit ships

What You Get

  • ✓ESP-EEG 16-Channel PCB (dual ADS1299)
  • ✓Pre-loaded firmware
  • ✓Open-source schematics & software

Looking for the current model? View ESP-EEG (8-Channel) — Available Now

Why Cerelog’s ESP-EEG?

Easy to use Software compatibility

Connect directly to the OpenBCI GUI — no fork download required — via Lab Streaming Layer protocol (LSL)

OpenBCI GUI live EEG visualization using Cerelog ESP-EEG

Setup instructions and LSL Custom Python connection script: OpenBCI GUI Setup Guide & LSL Script

Connect directly to the OpenBCI GUI — there is no fork to download — so you can visualize data easily and stream to other platforms. This works with its LSL streaming capability via a special Python script (in link above)!

The Cerelog ESP-EEG’s Python client software can stream data via the standard neuroscience software communication protocol Lab Streaming Layer. This means you can stream directly to your favorite neuroscience software or Matlab running on your laptop or remote computers, record data streams, and integrate ESP-EEG’s data with other data streams.

Stream data to BrainFlow API — Compatible for Powerful Data Analysis

The Cerelog ESP-EEG is fully compatible with BrainFlow, the industry-standard open-source library for acquiring and processing biosignals. This integration provides a unified, developer-friendly API to stream data directly into Python, C++, Java, and more, unlocking powerful tools for real-time analysis, signal processing, and BCI development.

BrainFlow API architecture diagram for multi-language biosignal processing

Note: Test script to quickly view plot and acquire data -> Run ’Shared_brainflow-cerelog/python_package/cerelog_tests/filtered_plot.py’ from in above repo. (Must download and run with full Brainflow instance to use)

How to Connect ESP-EEG to BrainFlow

📄 Setup guide: Cerelog user guide — software setup & board usage

⚙️ BrainFlow instructions: GitHub /Instructions — detailed & always up to date (the setup guide above also covers BrainFlow scripting basics with the device — highly recommended)

🔗 Cerelog Main Repo: github.com/Cerelog-ESP-EEG/ESP-EEG

Quick Browser GUI Tester (Limited Support)

A single Python script that pipes data directly to a browser-based GUI — no complex setup required. It’s a legacy tool with limited ongoing support, but it’s a great starting point: it connects to the PCB over serial and plots your data live in the browser.

This script is especially useful for understanding how data is moving over serial in real time. That said, the BrainFlow script above is significantly easier to work with and is the recommended path for any serious data collection or analysis.

General Visualization Software and Demos

PhantomLoop Integration — Browser Based Neural Decoder (Beta Testing)

A decoder is a small program — usually a machine-learning model — that looks at those signals and guesses what the person was thinking or trying to do.

A community-built browser-based decoder playground. Stream live EEG data from your ESP-EEG, run an ML model on it, and see predicted vs. actual outputs side by side — no local install needed. Built by community member yelabbassi; third-party.

Learn more about PhantomLoop →
What's Included
  • •1x Cerelog EEG Circuit Board
  • !Battery not included. Coin shown in photo is not included.
  • !User must provide their own USB-C cable capable of data transfer.
  • !Not included: EEG Electrode Cap kit, adapters, and gel.
i SOFTWARE STATUS:

USB-C connection is the most reliable method and is fully supported.

Bluetooth Low Energy (BLE) and WiFi are both supported for wireless streaming to the OpenBCI GUI; BLE is the newer of the two and the recommended wireless path. WiFi mode requires an initial firmware flash — setup steps are in the GitHub Quick Start Guide. For BrainFlow-based workflows, USB-C is the recommended connection method.

! ELECTRICAL SAFETY WARNING AND NOTICE

Only use device with a laptop running on its own power supply, ensure it is not charging. Do not use this device with any computer plugged into mains power. This device does not feature isolation circuitry to protect from mains faults or power surges.


The Cerelog ESP-EEG is not a medical device nor is it intended for medical diagnosis. Read full page for all notices.

Required & Recommended Accessories

The following items are not included but are required for a full setup.

3D Print your own case

Recommended
STL Files

EEG Electrode Cap Kit

Required
View Cap Kit
DIY Headset Alternatives
Ultracortex Mark III — Rigid 3D-Printed Cap

3D print your own headset using Ultracortex files + Cerelog adapter.

View Adapter Files
CereBRAH Soft-EEG — Community Soft Headband

A DIY soft EEG headband made from nylon webbing and elastic. Community-built, work in progress.

View Project Details

Touch-Proof Adapters

Required

Essential to connect electrode cap to board.

View Adapters

Electrode Gel

Required
View Gel

LIPO Battery

Recommended
Compatible LIPO Battery
View Battery

Product Demos

See the Cerelog ESP-EEG board in action. These demos showcase the real-time data streaming and BCI control capabilities.

Product Overview Guide and Live Data Visualization

Video demonstrating how to use product for real-time EEG signal data streaming and plotting.

Cerelog ESP-EEG 16-Channel board connection diagram

Advanced Signal Integrity & Features

Active Bias Drive for Superior Noise Cancellation

The onboard bias probe actively works to cancel common-mode interference from sources like mains hum (50/60Hz noise). By feeding an inverted common-mode signal back to the user, it dramatically improves signal quality, allowing for clean, DC-coupled data acquisition in challenging environments. This is a critical feature for high-fidelity research that many other boards lack.

High-Fidelity ADS1299 ADC

At its core, this research-grade bioamplifier board utilizes an ADC capable of resolving signals down to 10µV peak-to-peak (1-50Hz). While real-world performance is subject to environmental noise and setup, this high-precision foundation ensures you capture the most subtle neural signals.

Flexible Electrode Montage Configuration

The board features onboard slider switches that allow you to change montage modes without any firmware modification. Slide all switches to one side for SRB1 referential montage (each electrode measured against a single common reference), or slide them to the other side for differential montage. Do not modify the firmware montage setting — all montage switching is handled physically via the slider switches on the board.

Technical Specifications (ADS1299 Based)
Input Channels8 differential channels + 1 bias probe
ADC Resolution24-bit
Sample Rate125 SPS per channel when streaming (USB-C, BLE, or WiFi/LSL) — the same streaming rate as the OpenBCI Cyton + Daisy (16 CH). 250 SPS per channel when logging directly to the onboard microSD card.
ConnectivityUSB-C (primary connection, fully supported). Bluetooth 5.0 / Bluetooth Low Energy (BLE) is supported for wireless streaming — added recently, and the recommended wireless path. WiFi is also supported for LSL streaming to the OpenBCI GUI — see the WiFi setup steps in the guide for configuration.
Power Supply5V USB-C power
Battery SupportOnboard charging circuit for external LIPO battery
Electrode CompatibilityUser Supplied; See recommended 3RD party electrode supplies linked to the right
Additional FeaturesAdvanced noise suppression, DC bias correction, high-precision timing, onboard gpio debug LEDS
Research Applications

The Cerelog EEG Circuit Board is a versatile, high-precision tool designed for advanced research applications including:

  • •EEG (Electroencephalography) studies
  • •EMG (Electromyography) measurements
  • •ECG (Electrocardiography)
  • •Brain-Computer Interface (BCI) development
  • •Custom Computer Interface Development
Important Notice

This product is intended for research, engineering, and educational purposes only. It is not a medical device and has not been evaluated by the FDA. The product is not UL or FCC certified.

This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION PURPOSES ONLY and is not considered by Cerelog Inc. to be a finished end-product fit for general consumer use.

We expressly disclaim any liability whatsoever for any direct, indirect, consequential, incidental or special damages, including, without limitation, lost revenues, lost profits, losses resulting from business interruption or loss of data, arising from the use of this product.

Disclaimer: The Cerelog ESP-EEG board is not a medical device nor is it intended for medical diagnosis and provided to you "as is," and we make no express or implied warranties whatsoever with respect to its functionality, operability, or use, including, without limitation, any implied warranties, fitness for a particular purpose, or infringement. We expressly disclaim any liability whatsoever for any direct, indirect, consequential, incidental or special damages, including, without limitation, lost revenues, lost profits, losses resulting from business interruption or loss of data, regardless of the form of action or legal theory under which the liability may be asserted, even if advised of the possibility of such damages.

Cerelog Inc. assumes no liability for the performance, suitability, or use of any third-party products linked or recommended on this website.

*Wireless data transmission may be subject to bandwidth limitations and environmental factors. By ordering, you acknowledge and agree to our Terms of Service, Privacy Policy, and Legal Disclaimer.

*By ordering, you acknowledge and agree to our Return Policy.

The Cerelog ESP-EEG Circuit Board is not intended for medical use and is not approved by the FDA to treat or diagnose any conditions. Please expand and read the above Important Notices section.

Background & Design Context

The Cerelog ESP-EEG was designed from the ground up to close a gap that has existed in the low-cost biosignal hardware space for years: boards that use the right ADC chip but cut corners on every surrounding circuit decision. The ADS1299 is a genuine research-grade component — the same part found in instruments costing tens of thousands of dollars — yet many low-cost implementations treat it as a commodity part and ignore the reference design guidance that makes it perform well. The ESP-EEG was built by following that guidance closely, particularly around the bias drive topology and power supply filtering, rather than around minimizing BOM cost.

Choosing the ESP32 as the host microcontroller was deliberate. It handles SPI communication with the ADS1299 reliably over USB-C at the board's operating sample rate, while the onboard radios handle wireless. The ESP32-S3-Mini's Bluetooth 5.0 / Bluetooth Low Energy (BLE) support was added recently and is the better of the two wireless options; the WiFi radio enables LSL streaming to the OpenBCI GUI. The board ships with USB-C firmware pre-loaded. As with any microcontroller-based acquisition system, some data throttling applies and occasional packet loss is possible depending on the host environment. The USB-C interface handles the majority of current workflows reliably, and the LIPO charging circuit means the board can be untethered from a computer during a recording session when battery operation is preferred.

From a software standpoint, the decision to integrate with BrainFlow and let the board connect directly to the OpenBCI GUI rather than building a proprietary application reflects a philosophy of meeting researchers where they already are. Most academic labs already have Python environments with NumPy, SciPy, and MNE installed. Rather than asking users to learn a new toolchain, the ESP-EEG plugs into the infrastructure they already trust. The BrainFlow integration in particular means that any script written for another BrainFlow-compatible board can be adapted to work with the ESP-EEG with minimal modification.

The open-source firmware and published schematics serve a dual purpose: they allow technically capable users to audit exactly what the hardware is doing, and they create a foundation for community contributions. Several community-built tools — including the PhantomLoop neural decoder interface — have already emerged from users who were able to examine the data protocol directly. The Discord community exists specifically to lower the barrier for researchers who are domain experts in neuroscience or BCI but are not hardware engineers, connecting them with users who can help with setup questions quickly.

The board is positioned as a research instrument rather than a consumer product, and that distinction matters practically. It ships without a case by default because many research applications call for integration into a custom headset, enclosure, or experimental rig where a generic case would just get removed. STL files for a printable reference enclosure are available in the GitHub repository for users who want a standalone housing without designing their own.

BrainFlow CompatibleEasy integration with Python, C++, etc.
Active Bias DriveAdvanced common-mode noise rejection.
Bluetooth LE & WiFi OnboardBluetooth Low Energy (BLE) plus WiFi for LSL streaming to the OpenBCI GUI. Setup steps required — see guide.
Supports LIPO Battery Charging
Frequently Asked Questions
What is the Cerelog ESP-EEG 16-Channel?
The Cerelog ESP-EEG 16-Channel is a high-density, research-grade biosensing circuit board featuring dual Texas Instruments ADS1299 24-bit ADCs for 16 differential input channels plus 1 bias probe. It supports EEG, EMG, ECG, and BCI research applications, and features an ESP32-S3-Mini dual-core processor with Bluetooth Low Energy (BLE) and WiFi connectivity, USB-C, and onboard LiPo battery charging.
What software is compatible with the Cerelog ESP-EEG?
The Cerelog ESP-EEG is compatible with BrainFlow API (Python, C++, Java, C#, Julia, R, and more), the OpenBCI GUI (connect directly — no fork download required), and Lab Streaming Layer (LSL). It also includes a browser-based GUI tester and integrates with PhantomLoop, a browser-based neural decoder (currently in beta).
How does noise reduction work on the Cerelog ESP-EEG?
The Cerelog ESP-EEG uses True Closed-Loop Active Bias (Drive Right Leg / DRL), a noise reduction technique that feeds a processed reference signal back through a dedicated electrode to help reduce common-mode interference during EEG and biosignal recordings.
Does the Cerelog ESP-EEG support wireless streaming over Bluetooth Low Energy or WiFi?
Yes, over both radios. Bluetooth Low Energy (BLE) was added recently and is the better of the two wireless options. The ESP32-S3-Mini also supports WiFi, which is used for LSL streaming to the OpenBCI GUI. For BrainFlow-based data import, USB-C is the recommended connection. WiFi mode requires an initial firmware flash — see the guide for setup instructions.
Is the Cerelog ESP-EEG firmware and schematic open source?
Yes. The ESP-EEG firmware and schematics are fully open source and available on GitHub. Researchers can inspect, modify, and build upon the codebase for their specific applications.
What accessories do I need for EEG recording with the ESP-EEG?
For a complete EEG setup you will typically need an EEG electrode cap, touch-proof adapters, electrode gel, and a LiPo battery for untethered use. A 3D-printed case is also available. All compatible accessories are listed on the product page.
What is the price, and is international shipping available?
The Cerelog ESP-EEG 16-Channel is $999.99 USD and is available to order now. Boards are built to order, with an estimated Batch 1 ship date of October 15, 2026. US domestic shipping is $12. International shipping is available and calculated at checkout.
How does the Cerelog ESP-EEG 16-Channel compare to the OpenBCI Cyton + Daisy?
Both setups use the Texas Instruments ADS1299 24-bit ADC and offer 16 channels. The Cerelog ESP-EEG 16-Channel is priced at $999.99 USD, while the OpenBCI Cyton + Daisy retails for approximately $2,499 USD (as of August 17, 2026). The Cyton + Daisy requires a separate WiFi Shield add-on for wireless streaming; the Cerelog ESP-EEG has both Bluetooth Low Energy (BLE) and WiFi built in as standard. The Cerelog ESP-EEG also includes True Closed-Loop Active Bias (DRL) for noise reduction, onboard LiPo battery charging, and USB-C. It is compatible with BrainFlow and connects directly to the OpenBCI GUI (no fork download required), so existing Cyton users can switch with minimal workflow changes.
What is one of the most affordable 16-channel ADS1299-based alternatives to the OpenBCI Cyton + Daisy?
The Cerelog ESP-EEG 16-Channel uses dual Texas Instruments ADS1299 24-bit ADCs for 16 channels of high-density biosensing. It is compatible with BrainFlow, LSL, and the OpenBCI GUI (connect directly — no fork download required), and is priced at $999.99 USD compared to the OpenBCI Cyton + Daisy's approximate $2,499 USD (as of August 17, 2026).
Is the Cerelog ESP-EEG compatible with OpenBCI software and BrainFlow?
Yes. The Cerelog ESP-EEG works with BrainFlow (Python, C++, Java, C#, R, Julia, and more), the OpenBCI GUI (connect directly — no fork download required), and Lab Streaming Layer (LSL). Existing OpenBCI Cyton + Daisy users can generally switch with minimal workflow changes.
How does the Cerelog ESP-EEG relate to DIY ADS1299 + ESP32 builds?
The BCI community has long built custom setups combining the ADS1299 chip and ESP32 microcontroller to achieve Cyton + Daisy-level signal quality at lower cost. The Cerelog ESP-EEG is a professionally assembled, production-tested board using this same combination — with a closed-loop active bias design, onboard LiPo charging, and pre-loaded firmware, reducing the hardware debugging typically associated with DIY builds.
Is the Cerelog ESP-EEG approved for medical use?
No. The Cerelog ESP-EEG is a research and development tool, not a medical device. It is not approved by the FDA to treat or diagnose any conditions. It is designed exclusively for research, education, and BCI development.